Download CMOS Integrated Capacitive DC-DC Converters by Tom Van Breussegem, Michiel Steyaert PDF

By Tom Van Breussegem, Michiel Steyaert

This publication offers an in depth research of all facets of capacitive DC-DC converter layout: topology choice, keep watch over loop layout and noise mitigation. Readers will enjoy the authors’ systematic assessment that begins from the floor up, in-depth circuit research and an intensive evaluation of lately proposed strategies and layout methodologies. not just layout recommendations are mentioned, but in addition implementation in CMOS is proven, via pinpointing the technological possibilities of CMOS and demonstrating the implementation according to 4 cutting-edge prototypes.

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Extra info for CMOS Integrated Capacitive DC-DC Converters

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This concept is used to deal with high voltages while the individual components of the system are facing a small fraction of the high voltage is nowadays known as voltage domain stacking. This voltage domain stacking is actually a concept used in some of the most state-of-the-art DC–DC converters in Deep Sub Micron CMOS: if the individual components have limited voltage capability, a topology is used that exposes the components to only a fraction of the total voltage (Van Breussegem and Steyaert 2011; Somasekhar et al.

2 Capacitive Converters Discrete Capacitors Capacitive DC–DC converters typically require a higher number of components than the equivalent inductive types do. Therefore the capacitive converters using external components are typically topologies with a small number of capacitors: voltage doublers or voltage dividers. In Lau et al. 2007 a partially integrated voltage doubler is presented with a maximum efficiency of 91 %. The converter, shown in Fig. 3 V output. On the chip photograph, the switches Mr/i are indicated.

7. This means that a capacitive converter is determined by a conversion ratio N and an output impedance. Analysis of other topologies by means of this Charge Balance Method results in similar solutions. 3 Branch Analysis The Charge Balance Analysis is a technique to analyze a capacitive conversion block but for complex converter topologies it turns to be an exhaustive method. Therefore the following analysis has been developed to determine the output impedance, based on Tellegen’s theorem: Branch Analysis.

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