By Tom Van Breussegem, Michiel Steyaert
This publication offers an in depth research of all facets of capacitive DC-DC converter layout: topology choice, keep watch over loop layout and noise mitigation. Readers will enjoy the authors’ systematic assessment that begins from the floor up, in-depth circuit research and an intensive evaluation of lately proposed strategies and layout methodologies. not just layout recommendations are mentioned, but in addition implementation in CMOS is proven, via pinpointing the technological possibilities of CMOS and demonstrating the implementation according to 4 cutting-edge prototypes.
Read or Download CMOS Integrated Capacitive DC-DC Converters PDF
Best power systems books
Utilized arithmetic for Restructured electrical energy platforms: Optimization, keep an eye on, and Computational Intelligence contains chapters in accordance with paintings awarded at a countrywide technological know-how origin workshop equipped in November 2003. The subject matter of the workshop was once using utilized arithmetic to resolve hard strength procedure difficulties.
This booklet is as a result the author's paintings which used to be initiated a few decade in the past and which, meanwhile, has ended in his Ph. D. Thesis and a number of other technical papers. The e-book bargains with exact modeling of electrical machines in the course of brief and regular states, a subject matter which has been often refrained from within the literature.
In der Erstauflage stand die ingenieurmäßige Berechenbarkeit der Kennlinie des PV-Generators zur Lösung von Anpassungsproblemen im Vordergrund. In der zweiten Auflage wurde auf die Energie-Ertragsprognose von photovoltaischen Systemen zur Netzeinspeisung ausführlicher eingegangen und es wurden Methoden für Qualitätskontrolle und Ertragsgutachten vorgestellt.
Extra info for CMOS Integrated Capacitive DC-DC Converters
This concept is used to deal with high voltages while the individual components of the system are facing a small fraction of the high voltage is nowadays known as voltage domain stacking. This voltage domain stacking is actually a concept used in some of the most state-of-the-art DC–DC converters in Deep Sub Micron CMOS: if the individual components have limited voltage capability, a topology is used that exposes the components to only a fraction of the total voltage (Van Breussegem and Steyaert 2011; Somasekhar et al.
2 Capacitive Converters Discrete Capacitors Capacitive DC–DC converters typically require a higher number of components than the equivalent inductive types do. Therefore the capacitive converters using external components are typically topologies with a small number of capacitors: voltage doublers or voltage dividers. In Lau et al. 2007 a partially integrated voltage doubler is presented with a maximum efficiency of 91 %. The converter, shown in Fig. 3 V output. On the chip photograph, the switches Mr/i are indicated.
7. This means that a capacitive converter is determined by a conversion ratio N and an output impedance. Analysis of other topologies by means of this Charge Balance Method results in similar solutions. 3 Branch Analysis The Charge Balance Analysis is a technique to analyze a capacitive conversion block but for complex converter topologies it turns to be an exhaustive method. Therefore the following analysis has been developed to determine the output impedance, based on Tellegen’s theorem: Branch Analysis.